There has been known a method of manufacturing a semiconductor device where a glass layer for passivation is formed such that the glass layer covers a pn junction exposure portion in a process of manufacturing a mesa semiconductor device (see patent literature 1, for example). In manufacturing a semiconductor device which exhibits an excellent switching characteristic (a fast recovery diode) by using such a method of manufacturing a semiconductor device, the following manufacturing method is adopted. Hereinafter, such a manufacturing method is referred to as “conventional method of manufacturing a semiconductor device”.
FIG. 16 (a) to FIG. 16 (d) and FIG. 17(a) to FIG. 17(d) are views for explaining such a conventional method of manufacturing a semiconductor device. FIG. 16(a) to FIG. 16(d) and FIG. 17(a) to FIG. 17(d) are views showing respective steps of the conventional method.
The conventional method of manufacturing a semiconductor device includes, as shown in FIG. 16 (a) to FIG. 16 (d) and FIG. 17(a) to FIG. 17(d), “semiconductor base body forming step”, “trench forming step”, “heavy metal diffusion step”, “glass layer forming step”, “glass protection film forming step”, “oxide film removing step”, “electrode forming step”, and “semiconductor base body cutting step” in this order. Hereinafter, the conventional method of manufacturing a semiconductor device is explained in the order of these steps. In this specification, a main surface of the semiconductor base body on a side where trenches are formed is referred to a first main surface, and a main surface of the semiconductor base body on a side opposite to the first main surface is referred to as a second main surface.
(a) Semiconductor base body forming step
Firstly, an n+ type semiconductor layer 914 is formed by diffusion of an n type impurity from a surface of an n− type semiconductor layer (n− type silicon substrate) 910 on a second main surface side, and a p+ type semiconductor layer 912 is formed by diffusion of a p type impurity from a surface of the n− type semiconductor layer 910 on a first main surface side thus forming a semiconductor base body in which a pn junction arranged parallel to a main surface of the semiconductor base body is formed. It may be possible that an n− type semiconductor layer (n− type epitaxial layer) is formed on an n+ type semiconductor layer (n+ type silicon substrate) and, thereafter, a p+ type semiconductor layer is formed by diffusion of a p type impurity from a surface of the n− type semiconductor layer (n− type epitaxial layer) thus forming a semiconductor base body in which a pn junction arranged parallel to a main surface of the semiconductor base body is formed. Thereafter, oxide films 916, 918 are formed by thermal oxidation on a surface of the p+ type semiconductor layer 912 and a surface of the n+ type semiconductor layer 914 respectively (see FIG. 16(a)).
(b) Trench forming step
Next, predetermined opening portions are formed on the oxide film 916 at predetermined positions by photo etching. After etching the oxide film, subsequently, the semiconductor base body is etched thus forming trenches 920 having a depth exceeding the pn junction from the surface of the semiconductor base body on the first main surface side (in this case, the trenches 920 having a depth exceeding a boundary surface between the n− type semiconductor layer 910 and the n+ type semiconductor layer 914) (see FIG. 16 (b)). Along with such formation of the trenches, a pn junction exposure portion A is formed on an inner surfaces of the trench.
(c) Heavy metal diffusion step
Next, a layer 922 which constitutes a heavy metal diffusion source is formed on a surface of the semiconductor base body on a second main surface side in such a manner that the oxide film 918 is removed from the surface of the semiconductor base body on the second main surface side and, thereafter, the layer made of heavy metal (Pt, for example) is formed on the surface of the semiconductor base body on the second main surface side by a sputtering method or by resolving heavy metal (Pt, for example) in solution and applying the solution to the surface of the semiconductor base body on the second main surface side by spinning. Thereafter, heavy metal is thermally diffused at a predetermined temperature so that the carrier recoupling center is formed in the inside of the semiconductor base body (see FIG. 16(c)). The heavy metal diffusion step may be performed prior to the above-mentioned trench forming step.
(d) Glass Layer Forming Step
Next, after removing the layer 922 which constitutes the heavy metal diffusion source, a layer made of the glass composition for protecting a semiconductor junction is formed on an inner surfaces of the trench 920 and a surface of the semiconductor base body in the vicinity of the trench 920 by an electrophoresis method, and the layer made of the glass composition for protecting a semiconductor junction is baked so that a glass layer 926 for passivation is formed on a surface of the trench 920 (see FIG. 16(d)). Here, an oxide film 924 is formed on a surface of the semiconductor base body on a second main surface side.
(e) Glass Protection Film Forming Step
Next, a glass protection film (a glass protection film made of a pitch-based wax, for example) 928 is formed such that the glass protection film 928 covers a surface of the glass layer 926 (see FIG. 17(a)).
(f) Oxide film removing step
Next, the oxide film 916 is etched using the glass protection film 928 as a mask so that the oxide film 916 in an electrode forming region 930 and the oxide film 924 formed on the surface of the semiconductor base body on the second main surface side are removed (see FIG. 17(b)).
(g) Electrode Forming Step
Next, a Ni plating is applied to the semiconductor base body thus forming an anode electrode 932 in the electrode forming region 930 on the surface of the semiconductor base body on the first main surface side and forming a cathode electrode 934 on the surface of the semiconductor base body on the second main surface side (see FIG. 17(c)). The anode electrode and the cathode electrode may be formed by a gas phase method such as vapor deposition or sputtering in place of Ni plating.
(h) Semiconductor Base Body Cutting Step
Next, the semiconductor base body is cut by dicing or the like at a center portion of the glass layer 926 thus dividing the semiconductor base body into a plurality of chips whereby mesa semiconductor devices (pn diodes) 900 are manufactured (see FIG. 17(d)).
As has been explained heretofore, the conventional method of manufacturing a semiconductor device includes the step of forming the trenches 920 exceeding the pn junction on the surface of the semiconductor base body from the first main surface side where the pn junction arranged parallel to the main surface is formed (see FIG. 16(a) and FIG. 16(b)), and the step of forming the glass layer 926 for passivation in the inside of the trench 920 such that the glass layer 926 covers a pn junction exposure portion (see FIG. 16(d)). Accordingly, in the conventional method of manufacturing a semiconductor device, by cutting the semiconductor base body after forming the glass layer 926 for passivation in the inside of the trench 920, mesa semiconductor devices having high reliability can be manufactured.
The conventional method of manufacturing a semiconductor device also includes a step of forming the carrier recoupling center in the inside of the semiconductor base body by thermally diffusing heavy metal from the surface of the semiconductor base body on the second main surface side (see FIG. 16(c)). Accordingly, the conventional method of manufacturing a semiconductor device can manufacture a semiconductor device which exhibits the excellent switching characteristic with a short reverse recovery time trr.